In conventional converters with a pipelining structure or with successive approximation, as well as in what are known as delta-sigma converters, the quantizer of which comprises a large number of quantization stages, linearity problems arise due to component tolerances in resistor networks or in corresponding networks with connected capacitors. An extreme linearity can be obtained, given an output word width of one bit, through delta-sigma converters on the basis of what are known as noise shaping filters, and there are no special steps necessary for trimming resistors, or respectively, capacitors. However, given the same throughput, a low output bit width of the quantizer requires a higher clock frequency, which, for technological reasons, cannot be arbitrarily increased, however. To obtain an optimally large bandwidth at a certain clock frequency, noise shaping filters of third order or higher are needed which, however, would lead to instabilities, even given output word widths of several bits, as practice has demonstrated.
What are known as noise shaping filters of first, second, third and higher order are taught in the book "Integrated Analog-To-Digital And Digital-To-Analog Converters" by Rudy Van De Plassche, Kluwer Academic Publishers, Boston/Dordrecht/London, Chapter 10, pages 367 to 381.
U.S. Pat. No. 5,392,040 teaches a bit compression circuit for utilization in a delta-sigma D/A converter, wherein sampling data are converted into quantized data with low word width, and the quantization noise is fed back via a noise shaping filter.